A 16-bit high-speed low-power hybrid adder.
Assem S. HusseinVincent C. GaudetHassan MostafaMohamed I. ElmasryPublished in: ICM (2016)
Keyphrases
- low power
- high speed
- logic circuits
- power dissipation
- power consumption
- low cost
- single chip
- real time
- high power
- vlsi architecture
- low power consumption
- nm technology
- wireless transmission
- digital signal processing
- bit parallel
- frame rate
- gate array
- cmos technology
- delay insensitive
- power reduction
- image sensor
- vlsi circuits
- packet loss
- analog to digital converter
- image processing