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Buffer structure optimized VLSI architecture for efficient hierarchical integer pixel motion estimation implementation.

Haibing YinDong Sun ParkXiaoyun Zhang
Published in: J. Real Time Image Process. (2016)
Keyphrases
  • vlsi architecture
  • motion estimation
  • vlsi implementation
  • low complexity
  • low power
  • real time
  • low cost
  • motion vectors
  • neural network
  • image processing
  • optical flow
  • image data
  • super resolution
  • motion compensated