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CMOS Implementation of Synapse Matrices with Programmable Analog Weights.
Francisco J. Pelayo
Begoña Pino
Alberto Prieto
Julio Ortega
F. J. Fernández
Published in:
IWANN (1991)
Keyphrases
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circuit design
low cost
analog vlsi
pairwise comparison
signal processor
low power
high speed
signal processing
floating gate
weighted sum
single chip
relative importance
cmos image sensor
efficient implementation
linear combination
general purpose
analog circuits
vlsi architecture
data sets