A 32 b 90 nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation From Sub-Threshold to High Performance.
Kyle CraigYousef ShakhsheerSaad ArrabiSudhanshu KhannaJohn C. LachBenton H. CalhounPublished in: IEEE J. Solid State Circuits (2014)
Keyphrases
- energy efficient
- energy consumption
- multi core architecture
- wireless sensor networks
- low overhead
- energy efficiency
- distributed memory
- sensor networks
- energy saving
- base station
- data gathering
- data center
- routing algorithm
- high speed
- parallel processing
- data transmission
- data sets
- power management
- parallel processors
- sensor nodes
- scheduling algorithm
- routing protocol