A 1.25-Gb/s digitally-controlled dual-loop clock and data recovery circuit with enhanced phase resolution.
Chang-Kyung SeongSeung-Woo LeeWoo-Young ChoiPublished in: ISCAS (2006)
Keyphrases
- data sets
- high speed
- synthetic data
- database
- data sources
- data analysis
- raw data
- statistical analysis
- data structure
- high quality
- end users
- data objects
- image data
- small number
- neural network
- data distribution
- databases
- data quality
- original data
- spatial data
- missing data
- computer systems
- data collection
- data processing
- knowledge discovery
- high resolution