Multiplication of a Constant (2k ± 1) and Its Fast Hardware Implementation.
Ping-Chang JuiChin-Long WeyMuh-Tian ShiuePublished in: J. Signal Process. Syst. (2016)
Keyphrases
- hardware implementation
- signal processing
- efficient implementation
- dedicated hardware
- software implementation
- fpga implementation
- field programmable gate array
- image processing algorithms
- floating point
- hardware design
- hardware architecture
- pipeline architecture
- fpga technology
- memory management
- real time
- fpga device
- pipelined architecture
- multiresolution