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Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis.
Alain Darte
C. Quinson
Published in:
ASAP (2007)
Keyphrases
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high level synthesis
allocate resources
scheduling problem
parallel architecture
scheduling algorithm
round robin
error correction
case study
resource allocation
pattern recognition
design space exploration
objective function
parallel processing
resource constraints
parallel machines