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Evaluation of Stencil Based Algorithm Parallelization over System-on-Chip FPGA Using a High Level Synthesis Tool.
Luis Castano-Londono
Cristian Alzate-Anzola
David Marquez-Viloria
Guillermo Gallo
Gustavo Osorio
Published in:
WEA (2019)
Keyphrases
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detection algorithm
computational complexity
dynamic programming
k means
learning algorithm
pattern recognition
expectation maximization
optimal solution
search space
objective function
simulated annealing
np hard
case study
segmentation algorithm
real world
partial differential equations
parallel implementation