Low power synthesizable register files for processor and IP cores.
Matthias MüllerSven SimonHolger GryskaAndreas WortmannSteffen BuchPublished in: Integr. (2006)
Keyphrases
- low power
- single chip
- high speed
- gate array
- power consumption
- processor core
- multi core processors
- low cost
- high power
- level parallelism
- wireless transmission
- logic circuits
- ip networks
- vlsi circuits
- power reduction
- parallel processing
- delay insensitive
- low power consumption
- efficient implementation
- signal processor
- central processing unit
- vlsi architecture
- application layer
- network layer
- mixed signal
- real time
- power dissipation
- digital signal processing
- parallel programming
- field programmable gate array
- file system
- general purpose