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Timing verification of sequential dynamic circuits.
David Van Campenhout
Trevor N. Mudge
Karem A. Sakallah
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1999)
Keyphrases
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asynchronous circuits
dynamic environments
model checking
formal verification
real time
data sets
information systems
delay insensitive
e learning
knowledge base
case study
high speed