A Low Power High Resolution ROIC Design with 14-Bit column-Level ADC for 384 × 288 IRFPA.
Yajing ZhangWengao LuGuannan WangZhongjian ChenYacong ZhangPublished in: J. Circuits Syst. Comput. (2013)
Keyphrases
- low power
- analog to digital converter
- single chip
- power consumption
- high resolution
- high speed
- mixed signal
- low power consumption
- vlsi architecture
- low cost
- vlsi circuits
- logic circuits
- digital signal processing
- power dissipation
- cmos technology
- high power
- gate array
- nm technology
- cmos image sensor
- real time
- ultra low power
- image sensor
- power reduction
- data storage
- embedded systems
- image processing