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A 250 MHz-to-1.6 GHz Phase Locked Loop Design in Hybrid FinFET-Memristor Technology.

Naheem Olakunle AdesinaAshok Srivastava
Published in: UEMCON (2020)
Keyphrases
  • phase locked loop
  • high speed
  • cmos technology
  • nm technology
  • neural network
  • genetic algorithm
  • decision making
  • power consumption
  • low power