A Sparsity-Adapted Hardware Implementation of SNN for Cortical Spike Trains Decoding.
Tuoru LiJie YangTengjun LiuShurong DongChaoming FangWeidong ChenShaomin ZhangPublished in: BioCAS (2023)
Keyphrases
- feed forward
- hardware implementation
- spiking neurons
- spike trains
- biologically plausible
- nearest neighbor
- efficient implementation
- signal processing
- neural network
- software implementation
- hardware design
- fpga implementation
- hardware architecture
- field programmable gate array
- high dimensional
- image processing algorithms
- dedicated hardware
- single neuron
- pipeline architecture
- parallel architecture
- visual information processing
- fractal encoding
- fpga device
- image binarization
- general purpose
- pattern recognition