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A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems.
Praveen Bhojwani
Rabi N. Mahapatra
Eun Jung Kim
Thomas Chen
Published in:
VLSI Design (2005)
Keyphrases
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network on chip
power dissipation
packet switched
power consumption
routing algorithm
distributed systems
low power
network simulator
computer systems
design methodology
data transfer
simulation tools
design process
embedded systems
digital signal processing
multi processor