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Carry select adder with sub-block power gating for reducing active-mode leakage in sub-32-nm VLSIs.
Huan Minh Vo
Chul-Moon Jung
Eun-Sub Lee
Kyeong-Sik Min
Published in:
IEICE Electron. Express (2011)
Keyphrases
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data leakage prevention
power reduction
power dissipation
power consumption
cmos technology
data flow
block size
pattern matching
video coding
low power
image blocks
power management
silicon on insulator