Using Model Checking to Solve Supervisor Synthesis Problems.
Andreas MorgensternKlaus SchneiderPublished in: CDC/ECC (2005)
Keyphrases
- model checking
- temporal logic
- automated verification
- model checker
- formal verification
- temporal properties
- verification method
- finite state machines
- formal specification
- finite state
- formal methods
- reachability analysis
- linear temporal logic
- symbolic model checking
- partial order reduction
- computation tree logic
- np complete
- asynchronous circuits
- pspace complete
- phase transition
- artificial intelligence