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Efficient dual-precision floating-point fused-multiply-add architecture.
Arunachalam Venkatesan
Alex Noel Joseph Raj
Naveen Hampannavar
C. B. Bidul
Published in:
Microprocess. Microsystems (2018)
Keyphrases
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floating point
instruction set
floating point arithmetic
sparse matrices
fixed point
square root
floating point unit
image processing
image segmentation
similarity measure
fast fourier transform
interval arithmetic