3T-TFET bitcell based TFET-CMOS hybrid SRAM design for Ultra-Low Power applications.
Navneet GuptaAdam MakosiejAndrei VladimirescuAmara AmaraCostin AnghelPublished in: DATE (2016)
Keyphrases
- ultra low power
- low power
- power consumption
- circuit design
- case study
- evolutionary algorithm
- low cost
- building blocks
- hybrid learning
- single chip
- high speed
- engineering design
- computer aided
- design process
- cmos technology
- data transmission
- design principles
- neural network
- wireless sensor networks
- user interface
- learning environment
- e learning
- information systems
- genetic algorithm