Program Generation Using Simulated Annealing and Model Checking.
Idress HusienSven SchewePublished in: SEFM (2016)
Keyphrases
- model checking
- simulated annealing
- temporal logic
- formal verification
- model checker
- formal specification
- symbolic model checking
- temporal properties
- bounded model checking
- partial order reduction
- finite state machines
- epistemic logic
- finite state
- automated verification
- computation tree logic
- verification method
- reachability analysis
- dynamic analysis
- genetic algorithm
- transition systems
- pspace complete
- process algebra
- concurrent systems
- timed automata
- asynchronous circuits
- linear temporal logic
- evolutionary algorithm
- formal methods
- description language
- tabu search
- deterministic finite automaton
- search algorithm