Coarse-grain reconfigurable ASIC through multiplexer based switches.

Karen Gettings Marc Burke Jeremy Muldavin Michael Vai

Published in: HPEC (2015)

Keyphrases

coarse grain
fine grain
hardware implementation
integrated circuit
application specific
design methodology
hardware architecture
parallel computation
circuit design
multithreading
distributed memory
reconfigurable hardware
nested transactions
physical design
general purpose