Column-Parallel Vision Chip Architecture for High-Resolution Line-of-Sight Detection Including Saccade.
Junichi AkitaHiroaki TakagiKeisuke DoumaeAkio KitagawaMasashi TodaTakeshi NagasakiToshio KawashimaPublished in: IEICE Trans. Electron. (2007)
Keyphrases
- high resolution
- level parallelism
- real time
- low resolution
- active vision
- multi processor
- master slave
- floating point arithmetic
- multithreading
- computer vision
- analog vlsi
- image processing
- object detection
- management system
- parallel processing
- parallel implementation
- processor array
- detection algorithm
- lidar data
- high speed
- super resolution
- remote sensing
- high frequency
- visual search
- low cost
- parallel computers
- parallel architecture
- detection method
- eye movements
- parallel architectures
- vlsi implementation
- distributed processing
- parallel computing
- eye tracking
- host computer
- network on chip
- nm technology
- false positives