Simulation strategy after model checking: experience in industrial SOC design.
Hoon ChoiByeong-Whee YunYun-Tae LeePublished in: HLDVT (2000)
Keyphrases
- model checking
- temporal logic
- formal verification
- finite state
- verification method
- temporal properties
- formal methods
- epistemic logic
- model checker
- symbolic model checking
- concurrent systems
- process algebra
- timed automata
- formal specification
- artificial intelligence
- pspace complete
- finite state machines
- embedded systems
- computation tree logic
- partial order reduction