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A 219-to-231 GHz Frequency-Multiplier-Based VCO With ~3% Peak DC-to-RF Efficiency in 65-nm CMOS.
Amir Nikpaik
Amir Hossein Masnadi Shirazi
Abdolreza Nabavi
Shahriar Mirabbasi
Sudip Shekhar
Published in:
IEEE J. Solid State Circuits (2018)
Keyphrases
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power consumption
high speed
clock gating
cmos technology
low cost
computational complexity
low power
frequency band
radio frequency
relevance feedback
signal processing
low frequency
hardware implementation
clock frequency
signal noise ratio