Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture.
Tung-Chien ChenYu-Wen HuangLiang-Gee ChenPublished in: ISCAS (2) (2004)
Keyphrases
- vlsi architecture
- macroblock
- mode decision
- video coding
- low complexity
- rate distortion
- bit rate
- bitstream
- inter frame
- vlsi implementation
- motion vectors
- video compression
- real time
- coding efficiency
- motion estimation
- transform domain
- rate control
- mode selection
- compressed domain
- motion compensation
- multiview video coding
- video codec
- coding method
- selection algorithm
- multiresolution