An arbiter PUF secured by remote random reconfigurations of an FPGA.
Alexander SpenkeRalph BreithauptRainer PlagaPublished in: CoRR (2016)
Keyphrases
- real time
- randomly generated
- machine learning
- real time image processing
- high speed
- electronic devices
- computer vision
- low cost
- signal processing
- hardware implementation
- hardware design
- field programmable gate array
- hardware architectures
- software implementation
- single chip
- information security
- information retrieval
- neural network