An Efficient Hardware Implementation of a Robust and Low-Complexity ADSRC Timing Synchronization Design.
Huynh Trong AnhJinsang KimWon-Kyung ChoJongchan ChoiPublished in: ICECS (2006)
Keyphrases
- low complexity
- hardware implementation
- vlsi architecture
- hardware design
- efficient implementation
- fpga implementation
- motion estimation
- hardware architecture
- image processing algorithms
- computational complexity
- computer vision
- real time
- signal processing
- distributed video coding
- software implementation
- high speed
- multiple description coding
- mode decision
- lower complexity