Mapping of PRP/HSR redundancy protocols onto a configurable FPGA/CPU based architecture.
Holger FlattJürgen JasperneiteDaniel DennstedtTran Dinh HungPublished in: ICSAMOS (2013)
Keyphrases
- hardware implementation
- hardware architecture
- hardware design
- communication protocols
- software implementation
- real time
- level parallelism
- fpga implementation
- field programmable gate array
- fpga technology
- parallel architecture
- dedicated hardware
- communication protocol
- high speed
- pipelined architecture
- application level
- low cost
- xilinx virtex
- hardware architectures
- higher throughput
- management system
- multithreading
- general purpose
- heterogeneous computing