Designing asynchronous standby circuits for a low-power pager.
Joep L. W. KesselsPaul MarstonPublished in: Proc. IEEE (1999)
Keyphrases
- low power
- delay insensitive
- power dissipation
- power consumption
- high speed
- power reduction
- logic circuits
- low cost
- vlsi circuits
- cmos technology
- single chip
- high power
- power saving
- mixed signal
- digital signal processing
- shift register
- wireless transmission
- nm technology
- asynchronous circuits
- vlsi architecture
- image sensor
- real time
- high level synthesis
- low power consumption