CMOS full adder cells based on modified full swing restored complementary pass transistor logic for energy efficient high speed arithmetic applications.
Sriram Sundar SMahendran GPublished in: Integr. (2024)
Keyphrases
- energy efficient
- high speed
- low power
- logic circuits
- wireless sensor networks
- energy efficiency
- power consumption
- energy consumption
- power dissipation
- sensor networks
- delay insensitive
- base station
- data aggregation
- micron cmos
- multi hop
- routing protocol
- data gathering
- data dissemination
- metal oxide semiconductor
- real time
- low cost
- multi core architecture
- frame rate
- sensor nodes
- cmos technology
- data transmission
- floating point
- mobile computing