A Scalable GPT-2 Inference Hardware Architecture on FPGA.

Anil Yemme Shayan Srinivasa Garani

Published in: IJCNN (2023)

Keyphrases

hardware architecture
hardware implementation
hardware architectures
field programmable gate array
xilinx virtex
bayesian networks
associative memory
processing elements
machine learning
artificial neural networks
signal processing
block matching motion estimation