Low power VLSI sequential circuit architecture using critical race control.
Menahem LowyNeal ButlerRosanne TinklerPublished in: ACM Great Lakes Symposium on VLSI (2003)
Keyphrases
- low power
- high speed
- vlsi architecture
- gate array
- vlsi circuits
- cmos technology
- power dissipation
- mixed signal
- power consumption
- single chip
- low cost
- logic circuits
- nm technology
- delay insensitive
- power reduction
- wireless transmission
- real time
- high power
- low power consumption
- digital signal processing
- vlsi implementation
- low voltage
- multi channel
- signal processor
- control strategy
- design considerations
- control method
- chip design
- image processing