Low-Power Variation-Aware Cores based on Dynamic Data-Dependent Bitwidth Truncation.

Ioannis Tsiokanos Lev Mukhanov Georgios Karakonstantis

Published in: DATE (2019)

Keyphrases

low power
data dependent
low cost
power consumption
high speed
single chip
wireless transmission
digital signal processing
high power
logic circuits
low power consumption
vlsi circuits
rademacher complexity
vlsi architecture
risk bounds
power reduction
gate array
denoising
scale space