Design and Synthesis of Low Power Weighted Random Pattern Generator Considering Peak Power Reduction.
Xiaodong ZhangKaushik RoyPublished in: DFT (1999)
Keyphrases
- power reduction
- low power
- power consumption
- low cost
- power dissipation
- high speed
- single chip
- power saving
- low power consumption
- logic circuits
- gate array
- pattern generator
- digital signal processing
- vlsi architecture
- cmos technology
- energy saving
- image sensor
- design methodology
- fine grained
- access control
- ultra low power