A 1.8 V 3.2µW comparator for use in a CMOS imager column-level single-slope ADC.

Martijn F. Snoeij Albert J. P. Theuwissen Johan H. Huijsing

Published in: ISCAS (6) (2005)

Keyphrases

low cost
power consumption
higher level
high speed
levels of abstraction
data sets
focal plane
delay insensitive