VLSI architecture design of motion vector processor for H.264/AVC.
Kiwon YooJae Hun LeeKwanghoon SohnPublished in: ICIP (2008)
Keyphrases
- vlsi architecture
- motion vectors
- low complexity
- motion estimation
- bit rate
- video coding
- motion compensation
- macroblock
- compressed domain
- high speed
- vlsi implementation
- coding efficiency
- computational complexity
- rate distortion
- real time
- low power
- search range
- bitstream
- video quality
- video sequences
- reference frame
- block size
- block matching
- video coding standard
- low cost