Design and implementation of a modular, low latency, fault-aware, FPGA-based network interface.
Roberto AmmendolaAndrea BiagioniOttorino FrezzaFrancesca Lo CiceroAlessandro LonardoPier Stanislao PaolucciDavide RossettiFrancesco SimulaLaura TosorattoPiero ViciniPublished in: ReConFig (2013)
Keyphrases
- low latency
- massive scale
- high bandwidth
- hardware architecture
- hardware design
- high speed
- database
- wireless sensor networks
- efficient implementation
- communication networks
- hardware implementation
- continuous query processing
- stream processing
- application specific
- high throughput
- network structure
- data management
- data model
- real time