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A 12-bit, 5.5-μW single-slope ADC using intermittent working TDC with multi-phase clock signals.

Daisuke UchidaMasayuki IkebeJunichi MotohisaEiichi Sano
Published in: ICECS (2014)
Keyphrases
  • low signal to noise ratio
  • genetic algorithm
  • independent component analysis
  • learning phase
  • spectral analysis
  • gaussian white noise