A pointcut-based assertion for high-level hardware design.

Yusuke Endoh Takeo Imai Mikito Iwamasa Yoshio Kataoka

Published in: ACP4IS@AOSD (2008)

Keyphrases

hardware design
high level
low level
hardware implementation
fpga hardware
field programmable gate array
higher level
neural network
low level features
hardware software
programming language
intermediate level
low cost
efficient implementation
cooperative
lower level
case study
computer vision
machine learning