Verification of VHDL Designs Using VAL.
Larry M. AugustinBenoit A. GennartYoum HuhDavid C. LuckhamAlec G. StanculescuPublished in: DAC (1988)
Keyphrases
- model checking
- hardware implementation
- verification method
- neural network
- real time
- face verification
- person identification
- hardware design
- concurrent systems
- fpga implementation
- asynchronous circuits
- fingerprint verification
- formal verification
- signature verification
- design space
- formal methods
- integrated circuit
- design principles
- learning environment