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A Scalable High-Voltage Output Driver for Low-Voltage CMOS Technologies.
Erik J. Mentze
Herbert L. Hess
Kevin M. Buck
T. G. Windley
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2006)
Keyphrases
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low voltage
high voltage
power line
cmos technology
design considerations
operating conditions
random access memory
power management
data mining
low power
normal operation
partial discharge
training set
parallel processing