An Efficient Implementation of LZW Decompression in the FPGA.
Xin ZhouYasuaki ItoKoji NakanoPublished in: IPDPS Workshops (2016)
Keyphrases
- compression algorithm
- compression ratio
- hardware implementation
- hardware architecture
- high speed
- field programmable gate array
- efficient implementation
- data compression
- image processing
- fpga implementation
- hardware design
- fpga technology
- real time
- dedicated hardware
- software implementation
- compression scheme
- multi dimensional
- low cost
- lower bound
- computational complexity
- natural language
- multiscale
- neural network