Hardware implementation of a tessellation accelerator for the OpenVG standard.
Seung-Hun KimYunho OhKaram ParkWon Woo RoPublished in: IEICE Electron. Express (2010)
Keyphrases
- hardware implementation
- field programmable gate array
- signal processing
- efficient implementation
- hardware architecture
- dedicated hardware
- fpga implementation
- image processing algorithms
- hardware design
- parallel architecture
- software implementation
- image binarization
- computer vision
- data structure
- parallel implementation
- memory management