A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs.
Xin XinJens-Peter KapsKris GajPublished in: DSD (2011)
Keyphrases
- field programmable gate array
- hardware implementation
- fpga implementation
- electronic devices
- embedded systems
- parallel computing
- hardware architecture
- image processing algorithms
- programmable logic
- pipelined architecture
- fpga device
- hardware design
- high speed
- computing systems
- feedback loop
- differential equations
- hardware software
- reconfigurable hardware
- fpga technology
- phase locked
- massively parallel
- efficient implementation
- hardware description language
- pattern recognition
- case study
- information systems
- computer vision
- machine learning