Login / Signup
A 14-mW, 153.6-MHz clock-rate Δ∑ modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch.
Olujide A. Adeniran
Andreas Demosthenous
Published in:
ESSCIRC (2007)
Keyphrases
</>
high speed
power consumption
low power
cmos technology
nm technology
sampling rate
frame rate
power supply
random sampling
clock frequency
input data
real time
sample size
monte carlo
hd video
control system