Work-in-Progress: BloCirNN: An Efficient Software/hardware Codesign Approach for Neural Network Accelerators with Block-Circulant Matrix.
Yunji QinLei GongZhendong ZhengChao WangPublished in: CODES+ISSS (2022)
Keyphrases
- hardware software
- neural network
- hardware and software
- computing platform
- embedded systems
- computing systems
- field programmable gate array
- computer systems
- hw sw
- hardware design
- coefficient matrix
- personal computer
- hardware platforms
- software development
- software systems
- high performance computing
- low cost
- block wise
- single chip
- real time
- blue gene
- neural network model
- multi core processors
- artificial neural networks
- condition number
- software implementation
- least squares
- hopfield neural network
- high end
- back propagation
- control unit
- row column
- control software
- hardware designs
- source code
- massively parallel
- hardware implementation
- singular value decomposition
- cloud computing
- commercial off the shelf
- computer hardware
- linear algebra
- orthogonal basis