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Performance analysis of on-chip bufferless router with multi-ejection ports.

Chaochao FengZhuofan LiaoZhonghai LuAxel JantschZhenyu Zhao
Published in: ASICON (2015)
Keyphrases
  • high speed
  • network on chip
  • low cost
  • real time
  • data sets
  • genetic algorithm
  • analog vlsi