A layout-based schematic method for very high-speed CMOS cell design.
Fenghao MuChrister SvenssonPublished in: IEEE Trans. Very Large Scale Integr. Syst. (1999)
Keyphrases
- significant improvement
- clustering method
- similarity measure
- objective function
- artificial neural networks
- computational cost
- classification method
- synthetic data
- detection algorithm
- high accuracy
- experimental evaluation
- dynamic programming
- high precision
- neural network
- cost function
- prior knowledge
- pairwise
- preprocessing
- image sequences
- case study
- image processing
- genetic algorithm