Login / Signup
A 3-D Graphics Display System With Depth Buffer and Pipeline Processor.
Akira Fujimoto
Christopher G. Perrott
Kansei Iwata
Published in:
IEEE Computer Graphics and Applications (1984)
Keyphrases
</>
parallel architecture
virtual reality
depth information
real time
depth map
parallel processing
content based retrieval
computer architecture
single processor
single chip
frame buffer
buffer size
multi touch
high speed
high end
virtual environment
processing pipeline
high quality