Low-power multipliers by minimizing switching activities of partial products.
Nan-Ying ShenOscal T.-C. ChenPublished in: ISCAS (4) (2002)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- energy dissipation
- high power
- single chip
- low power consumption
- digital signal processing
- wireless transmission
- image sensor
- logic circuits
- vlsi architecture
- mixed signal
- vlsi circuits
- computational complexity
- power reduction
- delay insensitive
- data flow
- signal processor
- gate array
- ultra low power