How bit-vector logic can help improve the verification of LTL specifications over infinite domains.
Luciano BaresiMohammad Mehdi Pourhashem KallehbastiMatteo RossiPublished in: SAC (2016)
Keyphrases
- bounded model checking
- model checking
- bit vector
- model checker
- formal verification
- transition systems
- asynchronous circuits
- linear time temporal logic
- linear temporal logic
- concurrent systems
- automated verification
- temporal logic
- delay insensitive
- real world
- formal specification
- epistemic logic
- verification method
- neural network
- finite state machines
- modal logic
- transfer learning
- high level
- deterministic automata